A structure exists in which an interposer chip for connecting dissimilar upper and lower semiconductor chips is disposed between the upper and lower chips, and respective ground pins and power source pins of the semiconductor chips are connected by a thick wiring pattern.
A structure also exists in which semiconductor elements are flip chip bonded together through bumps, and an interposer provided with a wiring layer of a flat solid layer formed by an electrically conductive material is connected to the bumps.
A structure also exists in which a first semiconductor device is mounted on one face of a first wiring circuit board, a second semiconductor device is mounted on another face of the first wiring circuit board, and a second wiring circuit board that includes an opening containing a second semiconductor device and that includes an external electrode is connected to the other face of the first wiring circuit board.
A structure also exists in which plural semiconductor chips are mounted on a single package, and the structure includes a relay wiring circuit board that performs wiring between an application specified integrated circuit (ASIC) and a memory chip.